Spatially resolved mapping of electrical conductivity across individual domain (grain) boundaries in graphene.

All large-scale graphene films contain extended topological defects dividing graphene into domains or grains. Here, we spatially map electronic transport near specific domain and grain boundaries in both epitaxial graphene grown on SiC and CVD graphene on Cu subsequently transferred to a SiO2 substrate, with one-to-one correspondence to boundary structures. Boundaries coinciding with the substrate step on SiC exhibit a significant potential barrier for electron transport of epitaxial graphene due to the reduced charge transfer from the substrate near the step edge. Moreover, monolayer-bilayer boundaries exhibit a high resistance that can change depending on the height of substrate step coinciding at the boundary. In CVD graphene, the resistance of a grain boundary changes with the width of the disordered transition region between adjacent grains. A quantitative modeling of boundary resistance reveals the increased electron Fermi wave vector within the boundary region, possibly due to boundary induced charge density variation. Understanding how resistance change with domain (grain) boundary structure in graphene is a crucial first step for controlled engineering of defects in large-scale graphene films.